• Type: Dual JK flip-flop
• Trigger: Positive edge-triggered
• Number of Flip-Flops: 2
• Inputs: J, K, Clock (CLK), Preset (PR), Clear (CLR) for each flip-flop
• Outputs: Q and Q̅ for each flip-flop
• Logic Family: AC (Advanced CMOS TTL compatible)
• Package: 16‑pin DIP
• Supply Voltage (Vcc): 4.5 – 5.5 V
• Input Logic Levels: TTL compatible
• Propagation Delay: ~10 ns typical
• Operating Temperature: 0 °C to +70 °C (commercial)
• Function: Stores and toggles binary data; edge-triggered operation
• Applications:
  • Counters
  • Shift registers
  • Control circuits
  • Memory storage elements

Pin Summary (16‑Pin DIP)

• Pins 1, 2: J1, K1
• Pins 3, 4: Clock1, Clear1
• Pins 5, 6: Preset1, Q1
• Pins 7, 8: Q̅1, GND
• Pins 9–14: J2, K2, Clock2, Clear2, Preset2, Q2, Q̅2
• Pin 16: VCC